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Espressif Systems /ESP32-S3 /APB_SARADC /THRES_CTRL

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Interpret as THRES_CTRL

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https://regviz.com/r/Espressif Systems/ESP32-S3/APB_SARADC/THRES_CTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (THRES_ALL_EN)THRES_ALL_EN 0 (THRES3_EN)THRES3_EN 0 (THRES2_EN)THRES2_EN 0 (THRES1_EN)THRES1_EN 0 (THRES0_EN)THRES0_EN

Description

configure thres monitor enable

Fields

THRES_ALL_EN

enable thres0 to monitor all channel
THRES3_EN

no public
THRES2_EN

no public
THRES1_EN

enable thres1
THRES0_EN

enable thres0

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data